NAND Flash Data Recovery Cookbook (by Igor Sestanj):
http://adreca.net/NAND-Flash-Data-Recovery-Cookbook.pdfQuote:
1. Introduction
• 1.1. Flash memory
1.1.1 NAND
1.1.2 NOR
1.1.3 Facts
• 1.2 Flash Data Recovery
2. Pre-Image Operations
• 2.1 Chip-Off or JTAG
2.1.1 Standard Packages
2.1.1.1 TSOP Signals
2.1.1.2 TLGA Signals
2.1.1.3 BGA Signals
2.1.2. Signal Tracing
2.1.2.1 The NAND Flash Interface
2.1.2.2 JTAG Signals
2.1.2.3 eMMC Signals
2.1.2 4 USB Signals
2.1.2.5 Monolith Signals
2.1.2.6 Solid-state drives Techno Signals
2.1.2.7 oneNAND Signals
• 2.2 Removing memory chips form the PCB (If needed)
2.2.1 Soldering operations
2.2.2 JTAG pads
2.2.3 TSOP
2.2.4 TLGA
2.2.5 BGA
2.2.6 Monolith
2.2.7 USB Flash
2.2.8 Memory Cards
2.2.9 Solid-state drives
2.2.10 EMMC
2.2.11 oneNAND
3. Physical Image Reading
• 3.1 DUMP creation via JTAG
• 3.2 DUMP creation using Chip-Off
3.2.1 Protocol parameters
3.2.2 Bit error analysis (NAND direct access mode) and power adjustment for bit
error minimization
3.2.3 Bad columns analysis and removal
3.2.4 ECC detection
3.2.5 Physical images extraction (dump reading)
4. Virtual image Creation
• 4.1 Physical image structure analysis and description
• 4.2 Data transformations: Inversion and Scrambling (XOR) analysis
4.2.1 Inversion
4.2.2 Scrambling
4.2.3 Byte combination
4.2.4 Memory Modem
• 4.3 Data Organizations in NAND memory
4.3.1 Crystal Geometry Parameters
4.3.1.1 Blocks
4.3.1.2 Pages
4.3.1.3 Data Area
4.3.1.4 Spare Area
4.3.1.5 Logical Block Number
4.3.1.6 Logical Page Number
4.3.1.7 Block Header
4.3.1.8 ECC
4.3.1.9 Block Write Counter
• 4.4 Virtual page and block allocation analysis
4.4.1 Virtual Block Allocation
4.4.1.1Sequential
4.4.1.2 Parallel
4.4.1.3 Combined
4.4.1.4 Spare area analysis
• 4.5 Flash Translation Layer
4.5.1 Block Mapping
4.5.2 Other Functions
4.5.3 Translation table analysis and creation
4.5.4 Block sorting and filtering.
4.5.5 Analysis of LBN sequence integrity
• 4.6 Summary
5. Assembling a Logical Image
• 5.1 Reconstructing used data file system
• 5.2 Data extraction and verification
6. Conclusion
7. Reference