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Using VNR for a small 16Mbit SPI chip http://forum.hddguru.com/viewtopic.php?f=27&t=42932 |
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Author: | arvika [ December 12th, 2022, 19:18 ] |
Post subject: | Re: Using VNR for a small 16Mbit SPI chip |
You can do it with offsets and XOR elements. Probably other way too, maybe simpler way. But please do not ask how to do it, to complicated to explain But create ticket on TS, I'm sure they will help. |
Author: | crackz0r [ December 12th, 2022, 19:23 ] |
Post subject: | Re: Using VNR for a small 16Mbit SPI chip |
arvika wrote: You can do it with offsets and XOR elements. Probably other way too, maybe simpler way. But please do not ask how to do it, to complicated to explain But create ticket on TS, I'm sure they will help. Do you at least agree that this should be done in this case? I've figured out a way to do it. |
Author: | arvika [ December 13th, 2022, 2:29 ] |
Post subject: | Re: Using VNR for a small 16Mbit SPI chip |
I don't know. I do not see full dump. For example if you choose wrong page size it could mislead you to wrong assumptions. |
Author: | fzabkar [ December 13th, 2022, 3:30 ] |
Post subject: | Re: Using VNR for a small 16Mbit SPI chip |
crackz0r wrote: What I'd like to try to do is take those first 4 bytes from each page and append them to the end of the last data area. I could write a very simple tool to do this. |
Author: | crackz0r [ December 13th, 2022, 12:27 ] |
Post subject: | Re: Using VNR for a small 16Mbit SPI chip |
fzabkar wrote: crackz0r wrote: What I'd like to try to do is take those first 4 bytes from each page and append them to the end of the last data area. I could write a very simple tool to do this. I was thinking of a way to script this in python, but wound up doing it manually in hex editor by just shifting the leading 4 bytes of every 'sector' to the end of that sector. This was easy enough to do manually in this case since I am only dealing with a 16Mbit NAND. arvika wrote: I don't know. I do not see full dump. For example if you choose wrong page size it could mislead you to wrong assumptions. Page size is definitely correct. For this specific IC default page size is 528. Here is link to datasheet in case anyone was interested in looking. https://datasheetspdf.com/pdf/820872/Adesto/45DB161E/1 Also, thanks to you both for your replies! ALSO! Just realizing this that I forgot to mention, the first screenshot is of the end of the pages, and the second image is the beginning. You can see how those first 4 bytes of each page appear to be data followed by SA, and the end of the page is what I am assuming to be the preceding data of those 4 bytes. |
Author: | fzabkar [ December 13th, 2022, 13:22 ] |
Post subject: | Re: Using VNR for a small 16Mbit SPI chip |
Since the flash is read as a serial bitstream, is it possible that the leading 4 bytes of a particular sector are actually the last 4 bytes of the previous sector? In other words, could you just rotate the entire dump by 4 bytes to the left? |
Author: | crackz0r [ December 13th, 2022, 13:39 ] |
Post subject: | Re: Using VNR for a small 16Mbit SPI chip |
fzabkar wrote: Since the flash is read as a serial bitstream, is it possible that the leading 4 bytes of a particular sector are actually the last 4 bytes of the previous sector? In other words, could you just rotate the entire dump by 4 bytes to the left? So I was never familiar with the Rotate function until now...but...yes! That literally accomplished exactly what I needed, so, thanks! Learn something new every day! |
Author: | fzabkar [ December 13th, 2022, 14:04 ] |
Post subject: | Re: Using VNR for a small 16Mbit SPI chip |
Which command did you use to dump the flash? There is a "Continuous Array Read (Legacy Command: E8h Opcode)" which might explain the 4-byte shift. Quote: To perform a Continuous Array Read using the standard DataFlash page size (528 bytes), an opcode of E8h must be clocked into the device followed by three address bytes (which comprise the 22-bit page and byte address sequence) and four dummy bytes.
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Author: | crackz0r [ December 19th, 2022, 18:11 ] |
Post subject: | Re: Using VNR for a small 16Mbit SPI chip |
fzabkar wrote: Which command did you use to dump the flash? There is a "Continuous Array Read (Legacy Command: E8h Opcode)" which might explain the 4-byte shift. Quote: To perform a Continuous Array Read using the standard DataFlash page size (528 bytes), an opcode of E8h must be clocked into the device followed by three address bytes (which comprise the 22-bit page and byte address sequence) and four dummy bytes. I used FlashCat to dump the flash via SPI. Turns out the "Rotate" function is NOT what I needed, but, my original method of manually shifting the ending 4 bytes to the beginning of each page proved successful for me to reconstruct the data. |
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