July 25th, 2023, 0:35
July 25th, 2023, 7:57
July 25th, 2023, 11:37
July 25th, 2023, 12:54
csava wrote:The difficulty lies not only in correctly reading the chip, but reading the chip is the first step
July 25th, 2023, 22:27
July 29th, 2023, 10:35
July 30th, 2023, 0:37
Amarbir[CDR-Labs] wrote:Hi ,
I have Measured The Pins ,I will post results when i reach Home .VCCQ is 1.2 Volts and The Rusolut Reader Does Not Support Less Then 1.6 Volts ,How Are We Able To Read such Chips Then .
July 30th, 2023, 1:28
csava wrote:Amarbir[CDR-Labs] wrote:Hi ,
I have Measured The Pins ,I will post results when i reach Home .VCCQ is 1.2 Volts and The Rusolut Reader Does Not Support Less Then 1.6 Volts ,How Are We Able To Read such Chips Then .
The chip can be read by VNR with VCC=3.3V and VCCQ=1.8V. I am using the adapter I designed, which aims to facilitate the replacement of voltage pins with special configurations. For the 3K, I have read the latest updates, and they have added this chip to the chip database. However, I haven't tested the software with this new addition yet. As for the FE, there were significant issues when reading low voltage chips with the existing hardware. But I have successfully addressed this problem by patch. You can find more information about it on my website.
July 31st, 2023, 7:35
July 31st, 2023, 16:32
July 31st, 2023, 19:02
July 31st, 2023, 19:09
sourcerer wrote:I had an idea for the VCCQ of 1.2 Volts: You could try to use a Voltage divider made out of 2 resistors. Adding just 2 resistors should be a relatively easy modification for the adapters I guess.
August 1st, 2023, 14:16
August 1st, 2023, 20:17
August 2nd, 2023, 7:40
sin wrote:Hello. I would say one can if one knew what is the load current of the VCCQ line
__________Vin
|
|
r1
|
|------>load current to vccq and node voltage required.
r2
|
|
Gnd
However I would stick to 2x emitter followers. Why spend even a 1$
One should make sure that input current is always limited to a very low value and try not to fry the reader
PS
I could dexor my dump with same chip id. The controller is Innostor. I will give a shot with Exodia M series too...
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August 2nd, 2023, 7:46
August 2nd, 2023, 7:48
sin wrote:I think I am getting there
Loads to learn and explore. How would one go about "set features" || making custom file for RR || read sensitivity setting in VNR ?
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August 2nd, 2023, 8:05
sin wrote:Very good input. Its surely a very basic idea. However please correct me. Isn't VCCQ a constant DC signal. Why would you consider impedances in that case?
Putting LDO surely does not seems considerate towards impedance either.
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August 3rd, 2023, 14:17
August 3rd, 2023, 14:51
csava wrote:sin wrote:Very good input. Its surely a very basic idea. However please correct me. Isn't VCCQ a constant DC signal. Why would you consider impedances in that case?
Putting LDO surely does not seems considerate towards impedance either.
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When you integrate such a voltage divider system into the circuit, the internal resistance of the I/O pins and the pull-down resistor of the voltage divider are in series when the output is high. Therefore, when calculating the voltage at the midpoint, you also need to take the internal resistance of the pins into account. I believe this voltage divider system is not suitable for such an environment. A better approach would be to modify the gate threshold voltage of the internal N-MOSFETs in the I/O pins and provide the correct VCCQ bus voltage. This is the implementation principle of the Flash Extractor Reader Low Voltage Modification Patch that I have already completed. I apologize for any potential misunderstandings caused by my limited English proficiency while explaining this issue
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