pepe wrote:there is no such thing as zone table in the classic meaning in F3 seagates, zone vbar data is in RAP, not in the SA. Quite some dynamic tables are built from tables in rap during init.
I think, if zones were disabled RAP zone count would reflect that, however it is just normal in your rom... What is the point? restore 500G capacity? that would be crazy

Thanks for the clarification regarding RAP! You are absolutely right. The fact that the full 500GB zone parameters are already sitting in the ROM and aren't cut down is actually great news for me. It means I won't have to build a Frankenstein out of donor SA modules.
As for "what is the point" — it's pure academic curiosity and reverse engineering. I completely understand that for commercial DR this is crazy and a waste of time, but this is a pet project specifically to study the F3 architecture and bypass IBM's vendor locks.
By the way, a quick update on the Vendor Lock bypass. I tried to patch overlays 0x22 and 0x23 in the ROM (cleared the 0x08 lock flag at 0x19038 and 0x58E50). To bypass the checksum, I used a 32-bit aligned byte compensation method (moved 0x08 to an empty padding area with a mod 4 offset). This successfully tricks any basic SUM/XOR checks, but the drive still threw diag error 00000024.
Conclusion: The controller uses a strict polynomial CRC (likely a custom CRC-16 CCITT) for the overlays. The ROM wall is solid.
So, I'm abandoning the direct ROM patch and moving to Plan B: hardware bypass. I'm going to short the SPI Flash (Pin 2 DO to GND) at power-on to drop the Marvell into Boot 0x20M, and then upload an LDR into RAM via Y-Modem. That should give me full SA access, bypassing the ROM locks entirely.
Two questions for the gurus here:
Has anyone ever reversed the exact CRC polynomial and seed used for F3 overlays? Just out of academic curiosity.
Does anyone happen to have a compatible Loader (LDR) file for MuskiePlus (ST160NM0011) handy, so I don't have to extract it from an official .lod update?