NAND: Samsung K9F1208R0B from a very old device

[crackz0r]

Hi all,
I was looking for some pointers on rebuilding the NAND of a Samsung K9F1208R0B. Controller from original device is either software controlled/managed by an Intel PXA272 processor running a windows mobile/CE environment (FAT32).

I am using Rusolut VNR to rebuild the NAND, but am running into some strange things, such as blocks not aligning properly, and some other things.

Does anyone have any advice or have you had success on other NAND that was controlled by similar processor or similar environment?

Thanks

[Amarbir[CDR-Labs]]

Hi all,
I was looking for some pointers on rebuilding the NAND of a Samsung K9F1208R0B. Controller from original device is either software controlled/managed by an Intel PXA272 processor running a windows mobile/CE environment (FAT32).

I am using Rusolut VNR to rebuild the NAND, but am running into some strange things, such as blocks not aligning properly, and some other things.

Does anyone have any advice or have you had success on other NAND that was controlled by similar processor or similar environment?

Thanks

Hello,
Why not take help from VNR Guys , , Have you tried reading the NAND and mounting it in a DR software and scanning it ,We need to eliminate SA+ECC

[crackz0r]

Almost have a pristine logical at this point. Device uses LPN with pages scattered randomly throughout dumo rather than by block number/LBN. The FS is TFAT32, not FAT32, and I've got an image that will mount but it's quite corrupted. ECC is Solomon Reed and not in ecc database. It's got one 512 sized data area with 2 ecc areas in SA, 3 bytes each.

[Amarbir[CDR-Labs]]

Almost have a pristine logical at this point. Device uses LPN with pages scattered randomly throughout dumo rather than by block number/LBN. The FS is TFAT32, not FAT32, and I've got an image that will mount but it's quite corrupted. ECC is Solomon Reed and not in ecc database. It's got one 512 sized data area with 2 ecc areas in SA, 3 bytes each.

Well,
How About a Image of The Product And Also dont we have to arrange first LBN wise and then see if LPN inside LBN is in ascending order or random or rotation ? . TFAT32 i have never heard of this brother .Reed Solomon is not supported by VNR IMHO but you can read chip few times and use bitverify element and then work on output of that further .I do not think we can have 2 ECC per 512 Bytes Data area but like you i am also in learning stage and might be wrong ,But i love to guide VNR user if i can .

[crackz0r]

Figured it out!
Had to combine LPN and LBN positions as LBN (LBN was only one byte) AND there was a Bank structure to complicate things even more.
Read the NAND 23x and combined them via bit-verify to account for bit errors.

[DRUG]

Impressive work. Congrats.

[Arch Stanton]

Figured it out!
Had to combine LPN and LBN positions as LBN (LBN was only one byte) AND there was a Bank structure to complicate things even more.
Read the NAND 23x and combined them via bit-verify to account for bit errors.

username checks out.

[crackz0r]

Impressive work. Congrats.

Obrigado

username checks out.

Lol

[Amarbir[CDR-Labs]]

Figured it out!
Had to combine LPN and LBN positions as LBN (LBN was only one byte) AND there was a Bank structure to complicate things even more.
Read the NAND 23x and combined them via bit-verify to account for bit errors.

Well,
Show a Screen Shot And Screen shot of Structure Too ,Good Work