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 Post subject: Re: Which NAND flash reader ?
PostPosted: September 1st, 2020, 17:13 
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Joined: September 1st, 2020, 15:45
Posts: 6
Location: France
On-die ECC is not in the user or spare area. It may usually be in a different string.. I thinl


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 Post subject: Re: Which NAND flash reader ?
PostPosted: September 3rd, 2020, 5:25 
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Joined: May 12th, 2020, 11:27
Posts: 43
Location: France
XNoOp wrote:
Hello,
@nlc, what is your adapter? USB, JTAF or SPI to BGA UFS or BGA EMMC? is there a clamp to fix the chip without soldering?
I guess there are some readily available drivers for the adapter? Otherwise you have to wrap UFS/eMMC controller commands/address/data into the higher protocol level packets, is that right?
I am have only developped a driver for ARM Static Memory Controller connected to 8-bit ONFI NAND... The philosophy shall be similar right?
Regards,
Florian


I haven't really understood your questions :/
When the mmc controller is dead (because too much bit errors in the low level nand dies), you can't read the eMMC content by eMMC standards commands and standard pinout (CLK/CMD/D0 to D7).
The only way to recover files is to bypass the mmc controller and access the internal raw nand dies directly.
The hardware connection the the nand die is done through some non documented pad under the eMMC BGA package.
To do that I bought a specific physical adapter to multi-com company. With this is just to access nand pad connection, this is not a nand reader. So I developed my own nand reader and my own software to dump the nand dies.
There are some company who sell these king of thing, but price are very high, it's why I built everything myself.


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 Post subject: Re: Which NAND flash reader ?
PostPosted: September 3rd, 2020, 5:31 
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Joined: May 12th, 2020, 11:27
Posts: 43
Location: France
XNoOp wrote:
On-die ECC is not in the user or spare area. It may usually be in a different string.. I thinl


What do you mean by "On-die ECC" ? In the mmc I worked on, in nand dies each each page has 8832 bytes, formatted like this :
32 bytes spare area (used by controller to identify each page content and order), 8 data chunk of 1094 bytes (1024 data + 70 ECC) + 48 unused byte


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 Post subject: Re: Which NAND flash reader ?
PostPosted: September 6th, 2020, 6:12 
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Joined: September 1st, 2020, 15:45
Posts: 6
Location: France
@nlc, my question was what the adapter was used for. From my understanding it only connects to BGA pads and make the signals available as male or female pins.

Option 1: Then you use the GPIOs of your NUCLEO board to connect to the eMMC pins individually, namely CLK, CMD and DAT signals. Then how do you make sure all the GPIO pins are synchronous to the SCLK signal? Would not you need a host eMMC controller IP either in ASIC or FPGA to make sure it is eMMC protocol compliant?

Option 2: You are saying that you are bypassing the memory chip's embedded controller by special undocumented pins. I can not find such pins from JEDEC eMMC standard. The SPI mode has been deprecated since eMMC 4.3... so are you talking about some JTAG or boundary scan pins? How did you find them?

About MMC controller's limitations:
As you know, NAND Flash raw chips have built-in (on-die) ECC. It can be enabled or disabled.
I guess it is the same for the ECC engine within the eMMC controller.
As a result, you could disable ECC and readout the raw data (without any correction).
Another solution would be to:
- read NAND Flash one ECC block at a time, and build a list of uncorrectable ECC blocks...
- read all good ECC block with ECC enabled;
- disable ECC;
- readout all bad ECC blocks.

Thanks a lot for your further inputs.
BR,
Florian


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 Post subject: Re: Which NAND flash reader ?
PostPosted: September 6th, 2020, 10:26 
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Joined: September 1st, 2020, 15:45
Posts: 6
Location: France
I found that SD/SDIO host controller could be used to access eMMC device. Only the commands used will be different, that means we only need to customize low level software.
Many COTS boards come with micro-SD or SD interface.
As a result we only need an adapter to translate BGA eMMC interface into SD interface. Reballing is kind of tough, so an adapter with a clamp is best.


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 Post subject: Re: Which NAND flash reader ?
PostPosted: September 7th, 2020, 2:16 
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Joined: May 12th, 2020, 11:27
Posts: 43
Location: France
With my nucleo board I don't access to CLK/CMD and DAT signals. These signals are MMC signals, but in case of eMMC data recovery, internal controller is broken and data are not available through mmc standard protocol. We use raw nand access, using non documented pin below the BGA chip. Every manufacturer and/or chip model uses its own proprietary pinout.

Please read this doc you will understand better : https://rusolut.com/wp-content/uploads/ ... vsNAND.pdf


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