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Problematic NAND chip ID: 89 D3 AC 32 C6

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Gregory

Post subject: Re: Problematic NAND chip ID: 89 D3 AC 32 C6

Posted: August 25th, 2023, 4:27

Joined: September 23rd, 2019, 2:55
Posts: 60
Location: Poland

csava wrote:

Most chips have only 1 CE/1 LUN, so the fourth row address is always 0. Perhaps it's to clearly distinguish between blocks and LUNs, simplifying readability in firmware coding, or it's a preparation for addressing larger capacities, numerous block quantities, and multi-LUN chips in the future

Yes, B47R chip max cap is 8Tb and can have 2 or 4 LUNs so chip is multi-LUN. Extra LUNs are addressing on fourth row:)
DQ0 -DQ1 =00b LUN0
DQ0 -DQ1 =01b LUN1
DQ0 -DQ1 =10b LUN2
DQ0 -DQ1 =11b LUN3

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Gregory

Post subject: Re: Problematic NAND chip ID: 89 D3 AC 32 C6

Posted: February 14th, 2024, 7:44

Joined: September 23rd, 2019, 2:55
Posts: 60
Location: Poland

Hi guys, have any of you tried reading data from this chip using the new protocol in VNR (ALEx6)? I am asking about the BGA132 chip, not monolith? I can read ID in VNR with custom VCC/VCCQ - ID:32 89 D3 AC 32 C6, but dump is empty. Readning NVDDR3(ALEx6) all data is 0xFF, any other protocol give me 0x00. Has anyone checked in LA how VNR implements this protocol? Thanks.

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