Toshiba 4TB 3.5" - PCB - which is ROM IC ?

[Nick_CT]

Toshiba 4TB 3.5" HDWE140 - any suggestion as to which ICs need moving to donor PCB please?

Attachments

[unknown]

I would suggest IC10.
The other three ICs (9,11,12) have the same numbers.

May someone else confirm.

Good luck Nick.

[BGman]

The other three ICs (9,11,12) have the same numbers.

They are FET's.

[unknown]

The other three ICs (9,11,12) have the same numbers.

They are FET's.

+1
I suppose they are.

[fzabkar]

The other three ICs (9,11,12) have the same numbers.

They are FET's.

+1
I suppose they are.

-2

This is so funny and so sad.

viewtopic.php?f=1&t=31612

[Nick_CT]

Swapped IC10, drive spins up and seems to calibrate but remains BSY. Will have to swap the other ICs in question and see if that solves it.

[mhp666]

A doubt.
The LC LC138 Does it act as a multiplexer / demultiplexer?

[fzabkar]

A doubt.
The LC LC138 Does it act as a multiplexer / demultiplexer?

Yes. It decodes 2 address (or GPIO ?) bits into 4 chip selects.

[Nick_CT]

I tried moving only IC10, drive spun up but stayed BSY. Moved IC9,11,12 as well, that worked. So all 4 ICs need to be moved to donor PCB.

Attachments

[pcimage]

Thanks Nick!

[mhp666]

If I'm not mistaken, if you use the quad system (which is the most logical, since or else it would be a cost increase for nothing), you are working on spi writing at four and reading four at the same time, to increase the speed (6x), according to the datasheet indicated to us @fzabkar.

[fzabkar]

Only 1 of the 4 memories can be accessed at any time. That is the function of the 74LC138 decoder. Therefore the decoder provides no speed advantage. In fact a decoder would not have been necessary if the MCU had an additional 2 spare GPIO or address bits.

Dual I/O and quad I/O are features of each particular chip. When these modes are activated, the DO, DI, Hold and WP pins are redefined as I/O pins, and read speed is increased by a factor of 2 or 4, respectively

Attachments

W25Q80_pinout.gif (7.16 KiB) Viewed 24165 times

[mhp666]

I understand what you are saying, therefore what I have said does not make sense.
But then I do not understand why I use 4 chip instead of just one.

[fzabkar]

I understand what you are saying, therefore what I have said does not make sense.
But then I do not understand why I use 4 chip instead of just one.

I suspect that there is some redundancy, ie backups. Perhaps Nick_CT will provide dumps of each chip, assuming he has backed them up ...

BTW, there is at least on WD model with 7 such chips, and a Seagate model with 2.

[Nick_CT]

Attached is what the PC3K utility saved as ROM. (renamed to .txt from .bin for upload purpose)

No, I don't have backups of each individual IC.

Attachments

000000-07FFFF.txt

(512 KiB) Downloaded 981 times

[pepe]

There should be a 4MB flash image, as those chips are 8Mb each.
So you can probably read them manually through terminal or in a programmer...

[fzabkar]

AFAICT, the circuit is as follows:

Code:

                                             VCC
                                              +
                                              |
                                          .-+-|        4 x R
                                          | | |                       .---------.
                                        .-'-'-'-----.   ___           |     MCU |
                                        |/WP     DO |--|___|-+--------|         |
                                        | /Hold     |        |        |         |
                                        |        DI |--------)-+------| SPI     |
                                        |   IC12    |        | |      |         |
                                  .----o| /CS  Clk <|--------)-)-+----|         |
                                  |     '-.-.-.---.-'        | | |    |         |
                                  |       | | |   |          | | |    '--.---.--'
                                  |     .-'-'-'---'-.   ___  | | |       |   |
    VCC        VCC                |     |/WP     DO |--|___|-+ | |       |   |
     +          +                 |     | /Hold     |        | | |       |   |
     |          |        4 x R    |     |        DI |--------)-+ |       |   |
     |     .----'-----.   ___     |     |   IC11    |        | | |       |   |
     |     |      /Y7 |--|___|----' .--o| /CS  Clk <|--------)-)-+       |   |
     +-----| E3       |   ___       |   '-.-.-.---.-'        | | |       |   |
from | >---|/E2   /Y6 |--|___|------'     | | |   |          | | |       |   |
MCU  | >---|/E1       |   ___           .-'-'-'---'-.   ___  | | |       |   |
     |     |      /Y5 |--|___|------.   |/WP     DO |--|___|-+ | |       |   |
     |     |   IC8    |   ___       |   | /Hold     |        | | |       |   |
     '-----| A2   /Y4 |--|___|----. |   |        DI |--------)-+ |       |   |
           |          |           | |   |   IC9     |        | | |       |   |
     .-----| A1   /Y3 |---o       | '--o| /CS  Clk <|--------)-)-+       |   |
     |     |      /Y2 |---o       |     '-.-.-.---.-'        | | |       |   |
     |  .--| A0   /Y1 |---o       |       | | |   |          | | |       |   |
     |  |  |      /Y0 |---o       |     .-'-'-'---'-.   ___  | | |       |   |
     |  |  '----.-----'           |     |/WP     DO |--|___|-+ | |       |   |
     |  |       |                 |     | /Hold     |          | |       |   |
     |  |      ===                |     |        DI |----------+ |       |   |
     |  |      GND                |     |  IC10     |            |       |   |
     |  |                         '----o| /CS  Clk <|------------+       |   |
     |  |                               '--------.--'                    |   |
     |  |                                        |                       |   |
     |  |                                       ===                      |   |
     |  |                                       GND                      |   |
     |  '----------------------------------------------------------------'   |
     |                                                                       |
     '-----------------------------------------------------------------------'
(created by AACircuit v1.28.7 beta 02/28/13 www.tech-chat.de)

Attachments

[fzabkar]

FWIW, I see references to FW AREA1 and AREA0. The header of the main (?) ROM would suggest that the code section has a size of 0xCFF78. The CPs begin at 0xD0000.

Code:

Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F

00000000  43 6F 70 79 72 69 67 68 74 20 31 39 39 39 20 54  Copyright 1999 T
00000010  4F 53 48 49 42 41 20 43 6F 72 70 6F 72 61 74 69  OSHIBA Corporati
00000020  6F 6E 00 00 00 00 00 00 00 00 00 00 00 00 00 00  on..............
00000030  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
00000040  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
00000050  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
00000060  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
00000070  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
00000080  00 00 00 00 00 00 00 00 78 FF 0C 00 00 00 0D 00  ........xÿ......
                                  ^^^^^^^^    ^^^^^^^^
                               end of code    start of CPs

Code:

Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F

00000EB0  80 B0 53 80 41 52 45 41 31 20 64 61 74 61 20 61  €°S€AREA1 data a
00000EC0  6C 6C 20 63 6C 65 61 72 20 6F 70 74 69 6F 6E 20  ll clear option
00000ED0  69 73 20 72 65 71 75 69 72 65 64 21 21 0A 00 00  is required!!...
00000EE0  20 43 75 72 72 65 6E 74 20 46 57 20 41 52 45 41   Current FW AREA
00000EF0  31 20 73 74 61 72 74 20 61 64 64 72 65 73 73 20  1 start address
00000F00  3A 20 00 00 20 20 20 20 20 4E 65 77 20 46 57 20  : ..     New FW
00000F10  41 52 45 41 31 20 73 74 61 72 74 20 61 64 64 72  AREA1 start addr
00000F20  65 73 73 20 3A 20 00 00 F4 1D 00 00 07 1E 00 00  ess : ..ô.......
........
0006B6E0  D8 1D 0B 80 41 52 45 41 30 20 20 20 20 20 20 20  Ø..€AREA0       
0006B6F0  20 20 20 20 3A 20 00 00 41 52 45 41 31 20 20 20      : ..AREA1

[fzabkar]

There is a table of CPs at offset 0x78560. If we sum the sizes of each CP we get 0x567C0. This suggests that the second ROM must contain CPs, at least at the beginning.

0xD0000 + 0x567C0 = 0x1267C0

Attachments

ROM_CP_table.rar

(1.21 KiB) Downloaded 716 times

[unknown]

I tried moving only IC10, drive spun up but stayed BSY. Moved IC9,11,12 as well, that worked. So all 4 ICs need to be moved to donor PCB.

Thanks for sharing Nick.