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 Post subject: Post update about DR from 7200.14...
PostPosted: January 28th, 2014, 15:18 
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Joined: October 22nd, 2013, 5:27
Posts: 234
Location: Spain
Hello,

This is a continuation of the post viewtopic.php?f=1&t=27513 since it is getting all messed up.

I managed to acquire a good (better) donor for the ST1000DM003 I've been working on all this time. Tried a few things right out of the box, and then swapped heads. Again, I'm getting the MCMT read request failed (as in previous post), but this time, unlike the other time, after 5 minutes it gets into DRD DSC.

There's like a counter on the terminal - when it reaches zero, it goes ready:

Code:
Reconstruction: Completed 0: HeadPtr was unwritten
[MCMTWS]
MCMainPOR: MCTBufferPtr->Header.MCStateFlagsDisc = 00000001
MCMainPOR: MCTBufferPtr->Header.MCTStateFlags = 0000002A
MCMainPOR: MCStateFlags = 00000001

MCMainPOR: Feature Enabled...
PASS
Starting LBA of RW Request=0000000000087A80  Length=00000168                   <--------------- This is the countdown integer (starts on 0x168)
ProcessRWError -Read-   at LBA 0000000000087A80  Sense Code=43110081
Starting LBA of RW Request=0000000000087A84  Length=00000164
(...)
Starting LBA of RW Request=0000000000087BE0  Length=00000008
ProcessRWError -Read-   at LBA 0000000000087BE0  Sense Code=43110081
Starting LBA of RW Request=0000000000087BE4  Length=00000004                   <--------------- Next is zero and it goes ready, spinning
ProcessRWError -Read-   at LBA 0000000000087BE4  Sense Code=43110081
ASCII Diag mode

[DRD DSC]


After that, I've got full terminal access, but reading ID set the drive BSY forever, and I can't access user data. I can read the SMP (0x03 0x93) sectors from both SA copies, but when editing copy 0 and reading again, I can see that no changes were made at all (although I don't get an error on writing). Reading and editing copy 1 works ok. Trying to clear SMART returns a Diag Error on terminal after some seconds.

Thanks!
How would you address this case? I've tested heads on terminal and both heads resistances are quite similar, relatively. It's quite annoying to wait those 5 minutes every time...


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 Post subject: Re: Post update about DR from 7200.14...
PostPosted: January 28th, 2014, 15:44 
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Joined: October 22nd, 2013, 5:27
Posts: 234
Location: Spain
Some update: I can read V1 and other defect lists. I can also read some LBA's from terminal. But ATA is freakingly unresponsive.

As I said, I'm willing to pay for a solution (remotely, PC3K).


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 Post subject: Re: Post update about DR from 7200.14...
PostPosted: January 28th, 2014, 17:44 
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Joined: October 22nd, 2013, 5:27
Posts: 234
Location: Spain
Further update: Issuing a simple ^R after readiness is reached, for some reason I could read ID and make a resources backup (few errors on H0). Great! But I still have no LBA access. Terminal sector reading is still very slow... this one seems to be a very crappy unit that left the factory behind.

Trying to figure out now how to restore LBA access. I still have the problem related to the SMP not being saved on Copy 0...


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 Post subject: Re: Post update about DR from 7200.14...
PostPosted: January 29th, 2014, 13:42 
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Joined: October 22nd, 2013, 5:27
Posts: 234
Location: Spain
Problem SOLVED!

It was a serious problem with translator and SA copy 0 in general, and the fact that H0 cannot write at all, at least, on SA (when I recover all data I will try writing on user space).


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 Post subject: Re: Post update about DR from 7200.14...
PostPosted: January 31st, 2014, 23:30 
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Joined: December 13th, 2008, 13:35
Posts: 308
Location: Los Angeles, CA USA
Great job! Mind sharing the final solution that provided full sector access? Was it just a translator regen?

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 Post subject: Re: Post update about DR from 7200.14...
PostPosted: January 31st, 2014, 23:54 
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Joined: May 16th, 2009, 9:32
Posts: 325
Location: UNited Kingdom
And what TTL voltage levels did you use ?


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 Post subject: Re: Post update about DR from 7200.14...
PostPosted: February 1st, 2014, 7:49 
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Joined: October 22nd, 2013, 5:27
Posts: 234
Location: Spain
TTL voltages were the same as in previous families - 3.3V. But there are strange things :S this drive had full LBA access restored thanks to the almost-perfect-match donor I found for it.

Strange things:
1) The donor didn't show any terminal output or echoes. It was perfectly working, though.
2) I bought a previuos donor, but unfortunately the guy who sold it to me shipped me one from China WU and S/N W1D... instead the one I asked for and needed Thailand TK and Z1Dxxx. However, I gave it a try.
3) Patient platter on donor HSMA + donor PCB with original ROM writing was spinning. It seemed to callibrate, and terminal started to add strings, like MCMT read request failed, etc. I thought that would be enough in most cases for testing donor compatibility - I understand it has read SA directory at the point it complains about the Media Cache. However, terminal had very limited functionality, ending with LED 0xBD errors on most commands - flash and overlay.
4) So I bought this other donor with no terminal access :S replaced everything again in the clean room, and started playing with it. I noticed about that number counting down to zero (this didn't happen with W1D donor), so I waited to see what would happen when it reached zero. Guess what - ready! But for some reason, BSY trying to read ID. Issuing ^R before trying to read ID seemed to be enough for it to present itself.
5) Then I fought a while to switch off defect sparing, etc. with no success. Only in RAM. H0 was not writing for who knows what reason.
6) Translator file seemed to be random on each reading/power up, and copy 0 was unreadable/unwritable. V1 showed me the longest list I've ever seen - crappy since it left the factory.
7) Tried several times writing translator back from a copy that seemed good to me, and then NRGL clearing + Translator regen with no power off did the trick after several repetitions. Some times the translator was not initialized very well - LBA0 was different every time - until I saw a bright MBR just there.

The translator problem was hard to identify on the first place because all other problems (e.g. RECOV SERVO 0x165 0x05 every 10 seconds, funny singing noises every other minute) and the fact that reading with head 0 from terminal (with uninitialized or bad translator) reported Diag errors, whilst reading with H1 was OK for its first user cylinder, at least. I started to think that somebody took a magnet and swoop it on top of the platter a few times.

Long story short, data is back with just a couple bad sectors!


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 Post subject: Re: Post update about DR from 7200.14...
PostPosted: February 1st, 2014, 8:38 
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Joined: October 22nd, 2013, 5:27
Posts: 234
Location: Spain
Well, in fact I think H0 was not writing because it didn't pass the head integrity test, since sysfile 181 was unreadable. I guess FW switches off writing for heads not passing that test - but that's just my guess.


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 Post subject: Re: Post update about DR from 7200.14...
PostPosted: February 1st, 2014, 14:07 
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Joined: December 13th, 2008, 13:35
Posts: 308
Location: Los Angeles, CA USA
Interesting story deftrue, thanks for sharing the full details with us!

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 Post subject: Re: Post update about DR from 7200.14...
PostPosted: May 4th, 2014, 16:55 
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Joined: February 19th, 2014, 8:37
Posts: 115
Location: Earth
Why don't you give a dinner to all hdd guru's for your success it must be a party to celebrate the success of the case.


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 Post subject: Re: Post update about DR from 7200.14...
PostPosted: May 4th, 2014, 21:06 
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Joined: December 4th, 2012, 1:35
Posts: 3903
Location: Adelaide, Australia
Ill give you everything I have in my Mt Gox Acc Spildit ;)
Just checking now... OMG!!!! :)


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